Mask is used for the halftone exposure of three regions: a complete UV photo interrupt region, an UV light semi-transmitting region and a complete UV light transmitting region to carry out a photolithographic process and produce positive photoresists of different thicknesses, and its related technologies have been disclosed in Japanese Patent Laid-Open Publication No. Sho-61-181130 (published on Aug. 13, 1986) and Japanese Patent Laid-Open Publication No. 10-163174 (published on Jun. 19, 1998). The mask used for the halftone exposure that reduces the number of times of the photolithographic process in a TFT matrix substrate manufacturing process has been disclosed in Japanese Patent Laid-Open Publication No. 2000-066240 (published on Mar. 3, 2000) and Japanese Patent Laid-Open Publication No. 2000-206571 (published on Jul. 28, 2000). The mask is used for a halftone exposure, and a photolithographic process separates the components of an amorphous silicon thin film semiconductor layer for one time and forms a source electrode and a drain electrode and removes an ohmic contact layer of a channel of a thin film transistor component.
Japanese Patent Laid-Open Publication No. 2001-221992, Japanese Patent Laid-Open Publication No. 2001-228493 and Japanese Patent Laid-Open Publication No. 2001-235763 use two layers: a transparent electroconductive layer and a metal layer and adopt the halftone exposure method to carry out a photolithographic process for one time and form a gate electrode, a common electrode and a counter pixel electrode simultaneously.
Japanese Patent Laid-Open Publication No. 2001-201756 (published on Jul. 21, 2001) uses two layers of metal or alloy and adopts the halftone exposure method to carry out the photolithographic process for one time and form a gate electrode, a common electrode and a liquid crystal driving comb common electrode of a horizontal electric field display apparatus simultaneously. Similarly, two metal or alloy layers and the halftone exposure method are used to carry out the photolithographic process for one time and form a source electrode, a drain electrode and a liquid crystal driving comb pixel electrode simultaneously.
Japanese Patent Laid-Open Publication No. 2001-311965 (published on Nov. 9, 2001) adopts the halftone exposure method to carry out the first photolithographic process and separate the components of a gate electrode and a thin film semiconductor layer, and adopts the halftone exposure method to carry out the second photolithographic process and form a contact hole and a pixel electrode of a channel protective film of a thin film semiconductor component. The halftone exposure method is carried out twice and the general exposure method is carried out once, and thus the photolithographic process is carried out for three times to complete the TFT matrix substrate.
Japanese Patent Laid-Open Publication No. 2002-107762 (published on Apr. 10, 2002) uses two layers: a transparent electroconductive film layer and a metal layer and adopts the halftone exposure method to carry out the first photolithographic process and form a gate electrode and a transparent pixel electrode simultaneously. After the first photolithographic process is carried out, no other metal exists on the transparent pixel electrode, and the transparent pixel electrode is exposed completely. Further, the halftone exposure method is adopted to carry out the second photolithographic process and separate the components of the thin film semiconductor layer to expose the transparent pixel electrode completely. Finally, a general exposure method is adopted to carry out the third photolithographic process and connect the completely exposed transparent pixel electrode directly with the drain electrode, and electrically connect the transparent pixel electrode to the thin film transistor component. The formation of holdup capacitor (Cst) has not been discussed.
The manufacturing process as disclosed in Japanese Patent Laid-Open Publication No. 2002-141512 (published on May 17, 2002) is similar to the manufacturing process as disclosed in Japanese Patent Laid-Open Publication No. 2002-107762, except that only the first halftone exposure method is used, and two layers: a transparent electroconductive film layer and a metal layer are used to carry out the first photolithographic process of the general exposure method to form a gate electrode and a pixel electrode. After the first manufacturing process is completed, the transparent pixel electrode still has opaque metal. Further, the photolithographic process uses a mask for the halftone exposure, and components of the thin film semiconductor layer are separated, and the transparent pixel electrode is exposed completely. The third photolithographic process of the general exposure method connects the completely exposed transparent pixel electrode directly with the drain electrode and electrically connects the transparent pixel electrode to the thin film transistor component.
Japanese Patent Laid-Open Publication No. 2003-057673 (published on Feb. 26, 2003) uses two layers: a transparent electroconductive film layer and a metal or alloy layer and adopts the halftone exposure method to carry out the first photolithographic process and form a gate electrode, a common electrode, a transparent common electrode for driving liquid crystals or a comb common electrode for driving liquid crystals of a horizontal electric field LCD apparatus
Japanese Patent Laid-Open Publication No. 2004-038130 (published on Feb. 5, 2004) adopts the halftone exposure method and the first photolithographic process to separate the components of the thin film semiconductor layer to form a contact hole of a terminal and a contact hole for forming an electrostatic protection circuit. Japanese Patent Laid-Open Publication No. 2002-107762 and Japanese Patent Laid-Open Publication No. 2002-141512 similarly adopt the halftone exposure method to separate the components of the thin film semiconductor layer and expose the terminal. Since the manufacturing process is provided for manufacturing a horizontal electric field LCD apparatus, therefore the opening on the pixel region is not formed completely. In the third photolithographic process, the liquid crystal driving wedge-shaped pixel electrode forms a source electrode and a drain electrode by adopting the general exposure method.
Japanese Patent Laid-Open Publication No. 2004-281687 relates to the manufacture of a positive-diversity TFT substrate, and adopts the halftone exposure method to carry out the photolithographic process for one time, and forms a source electrode and a drain electrode and separates the components of the thin film semiconductor layer.
Japanese Patent Laid-Open Publication No. 2004-319655 adopts a manufacturing process similar to that of Japanese Patent Laid-Open Publication No. 2002-141512, and uses two layers: a transparent electroconductive film layer and a metal layer and adopts the general exposure method to carry out the first photolithographic process and form a gate electrode and a pixel electrode, and then adopts the halftone exposure method to carry out the second photolithographic process, and separate the components of the thin film semiconductor layer and completely expose the transparent pixel electrode. Further, the general exposure method adopted in the third photolithographic process directly connects the completely exposed transparent pixel electrode and drain electrode.
In Japanese Patent Laid-Open Publication No. 2000-066240, Japanese Patent Laid-Open Publication No. 2001-311965 and Japanese Patent Laid-Open Publication No. 2002-107762, a combination of a halftone exposure method and a mask deposition P-CVD method is adopted to reduce the number of times of the photolithographic process.
Japanese Patent Laid-Open Publication No. H-07-230097 (published on Aug. 29, 1995), Japanese Patent Laid-Open Publication No. H-11-109393 (published on Apr. 23, 1999) and Japanese Patent Laid-Open Publication No. 2001-042347 (published on Feb. 16, 2001) disclosed a mechanism for controlling the alignment direction of liquid crystal molecules and the alignment control electrode in a MVA mode LCD apparatus. In Japanese Patent Laid-Open Publication No. H-07-230097, an alignment control electrode is split from a gate electrode, and extended in a direction of 45 degrees with respect to the gate electrode. The electric potential of the alignment control electrode is set to be the same as the electric potential of the gate electrode. The alignment control electrode and the pixel electrode are in direct contact with the vertical alignment film. The alignment control electrode and the gate electrode are made of the same material and formed at the same time of forming the gate electrode. A gate insulating film and a thin film semiconductor layer exist in the same pattern of the alignment control electrode and at a lower layer of the alignment control electrode.
In a second preferred embodiment of Japanese Patent Laid-Open Publication No. H-11-109393, a TFT has a positive diversity structure and comprises a pixel electrode (ITO layer), a source electrode, a drain electrode (chromium layer), an amorphous silicon thin film semiconductor layer, a silicon nitride insulating layer and a gate electrode (chromium layer) stacked on a lateral side of a substrate. From the structure, the alignment control electrode and the gate electrode as illustrated in FIG. 2 of Japanese Patent Laid-Open Publication No. H-11-109393 are formed on the same layer. The alignment control electrode and the gate electrode are independent with each other and set to an electric potential different from that of the corresponding electrode. Although the vertical alignment film is in direct contact with the alignment control electrode, the vertical alignment film is not in direct contact with the pixel electrode, because the pixel electrode is completely coated with the gate insulating film (or silicon nitride insulating layer).
In Japanese Patent Laid-Open Publication No. 2001-042347, a TFT has a counter diversity structure and comprises a gate insulating film disposed at a lower layer of the transparent pixel electrode (ITO film), a protruding insulator formed at an upper layer of the transparent pixel electrode, and an alignment control electrode formed on the protruding insulator. The structure is produced by performing six times of the masking procedure. The voltage applied to the alignment control electrode is the same as the voltage applied to the common electrode. The vertical alignment film is in direct contact with both alignment control electrode and transparent pixel electrode.
After aluminum alloy is used to form the gate electrode, source electrode and drain electrode, a contact hole is created, and the transparent electrode (or an oxide transparent conductor of an ITO film) is connected, an aluminum oxide layer is formed at a joint interface on the aluminum oxide layer, and thus causing a problem of increasing the electric resistance with time. In Japanese Patent Laid-Open Publication No. 2001-174848, mixed nitrified gas and argon gas are reacted and sputtered to form a doped nitrogen-containing aluminum alloy layer on the surface of the aluminum alloy during the final stage of the sputtering and film formation of the aluminum alloy. With this manufacturing process, the problem of connecting aluminum alloy with the oxide transparent conductor can be solved.
For large substrates, the color filter substrate manufacturing method is used to form a spacer for a cell gap by means of a photolithographic process that uses a mask. To achieve a high-contrast figure, any optical leak occurred at the surrounding of the ball spacer should be prevented completely, since the ball spacers used in the TN mode are distributed randomly. The photolithographic process for precisely controlling the positions of forming the spacers can be used to form spacers in the region of BM (light-shielding film).
When the BM (light-shielding film) or three R, G, B color filter layers of the color filter substrate are formed, a slit coater is used for coating a special-purpose negative photoresist onto the substrate, and the photolithographic process using a mask forms each pattern. For super large substrates of an LCD TV panel and BM, R, G, B patterns are formed by the mask of the photolithographic process, and MVA mode color filter substrate is formed on the transparent electroconductive film (or ITO film), and the photolithographic process forms slender protruding lumps for controlling the alignment direction of liquid crystal molecules. When spacers are used for forming the cell gaps, the photolithographic process is carried out for six times for the color filter substrate of the MVA mode LCD panel, and corresponding masks are required.